3-wire coincident current core memory

ABSTRACT

A magnetic core storage system incorporates a metallic ground plane having apertures for mounting magnetic cores therein. The ground plane is disposed between the drive lines and a shared sense-inhibit line, thereby aiding noise reduction in the system and reducing recovery time. Only three lines are required to complete the system while retaining all operative functions.

O Unlted States Patent 1 1 3,573,762

[72] inventor Richard W. Svohodny [56] References Cited Bloom, Minn. UNITED STATES PATENTS [211 P 794,514 3,229,264 1/1966 Lee 340/174 [221 FM I'm-28,1969 3,479,655 11/1969 Quinn 340/174 1 Patented APP-6,1971 3,197,746 7/1965 Stoehretal 340/174 [73] Asslgnee United Statesoi'Americaasrepresented by h secretary u Navy Pnmary Examiner-Stanley M. Urynowlcz, Jr.

[54] 3-WIRE COINCIDENT CURRENT CORE MEMORY SENSE-INHIBIT LINE Attorney.rL. A. Miller, Q. E. Hodges, A. Sopp and R. F.

Rotella ABSTRACT: A magnetic core storage system incorporates a metallic ground plane having apertures for mounting magnetic cores therein. The ground plane is disposed between the drive lines and a shared sense-inhibit line, thereby aiding noise reduction in the system and reducing recovery time. Only three lines are required to complete the system while retaining all operative functions.

COPPER FOIL PATENTED APR 6 I971 SENSE- INHIBIT LINE FIG. I.

GROUND PLANE SHARED SENSE-INHIBIT LINE FIG. 2.

/ ATTORNEY-S 3-WIRE COINCIDENT CURRENT CORE MEMORY The invention described herein may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.

BACKGROUND AND SUMMARY This invention relates to memory systems and, more particularly, to magnetic core memory systems of the coincident current core type.

Conventional magnetic core memory matrices are widely employed in the art for the rapid speed and storage capacity which they possess. Conventional systems of that type, however, suffer from a number of disadvantages such as the difficulty in lowering noise level without, at the same time, degrading recovery time performance. Furthermore, such units require the use of at least four lines to be threaded through each core in a plane. Because of this it is necessary to utilize wire of a relatively fine gauge which increases the resistance of the signal flow path while at the same time causing an increase in the amount of heat produced within the system.

It is therefore an object of the present invention to provide a magnetic core memory system which requires the use of only three lines to achieve unique address location as well as providing sense and inhibit functions.

Another object of the present invention is to provide an improved magnetic core memory system with improved noise level qualities.

A further object of this invention is to provide a magnetic core memory system with an improved recovery time as well as reduced heat generation.

BRIEF DESCRIPTION OF THE DRAWINGS These and other objects of the invention will become apparent from the following specification including claims and drawings in which:

FIG. 1 is a perspective drawing partially in section of a magnetic element used in an embodiment of the invention;

FIG. 2 is a perspective drawing partially in section showing the manner in which a plurality of magnetic core elements are threaded according to the principles of the invention;

FIG. 3 is a graphical presentation of the current waveforms useful in describing the operation of the embodiments of FIGS. 1 and 2.

DETAILED DESCRIPTION AND OPERATION Referring now to FIG. 1 of the drawings, there is shown one embodiment of the invention which includes a ground plane composed of a suitable conductor such as copper foil material. A portion of ground plane 10 is etched or cutaway to provide an aperture 18 for inserting a conventional ferromagnetic core 20. The core has a generally toroidal configuration and is disposed within aperture 18 such that the upper half of the cores curved surface lies above the ground plane 10 and the lower half lies below the ground plane 10. That is, the axis of core 20 is substantially coplanar with the ground lane.

p An X-drive line 12 is disposed adjacent to the lower or underneath portion of ground plane 10, as viewed, and is threaded through the lower half of the magnetic core 20 thereby forming a winding about core 20 in the manner well known in the art. Similarly, a Y-drive line 14 of generally transverse orientation with respect to X-drive 12 is disposed adjacent to the lower or underneath portion of ground plane 10, as viewed, and is similarly threaded through the lower half of the core 20 also forming a winding therewith.

A third line 16 disposed adjacent to the upper portion of ground plane 10, as viewed, is threaded through the upper portion of core 20. Drive line 16 is herein designated as the sense-inhibit line. The sense-inhibit line 16 is connected to respective high and low impedance circuits to achieve functional separation of the pulses.

In FIG. 2, there is shown the manner in which a plurality of cores 40 and 50 are oriented with respect to a metallic ground plane 30. An aperture 34 is provided in ground plane 30 for insertion of a ferromagnetic memory core 50 such that the axis of core 50 is substantially coplanar with ground plane 30. Another core 40 is similarly disposed with respect to ground plane 30 and has its axis oriented with respect to the axis of core 50 in the manner well known in the core matrix art.

Cores 40 and 50 are threaded respectively by parallel X- drive lines 32 and 33 disposed adjacent to the lower half of the ground plane 30, as viewed. Y-drive line 38 is threaded through cores 40 and 50 adjacent to the lower portion of ground plane 30, as viewed, at right angles to the X-drive line 32 and 33. A shared sense-inhibit line" 36 is threaded through cores 40 and 50 and is disposed adjacent to the upper portion of the ground plane 30, as viewed.

The entire magnetic core matrix may comprise any suitable number of magnetic memory cores disposed within ground plane 30, each of the cores being threaded by X-drive and Y- drive lines and a sense-inhibit line in the manner shown in FIG. 2.

Referring now to FIG. 3, by way of example only, a suitable memory cycle for use with the embodiments of the invention shown in FIGS. 1 and 2 may have the following characteristics. The copper foil ground plane may have a one-half ounce rating. The memory stacks may comprise 4,096 words of 32-bits each configured in one or more memory banks of 4 K increments, giving a 1.8 microsecond speed. A period of approximately 0.2 microseconds is required to bring up the address an turn on the selection switches. The rise time of this read current 42 through the stack of memory core planes is 0.1 microseconds. To insure against time limiting a 0.4 microsecond full read current is used. The turnoff time of the read current 42 is 0.1 microseconds. The inhibit translation and switches require 0.2 microseconds to turn on. The inhibit current 46 rise time in the memory core bit planes is 0.2 microseconds. To insure that the restore current 44 is not at full amplitude before the inhibit current, the restore current is initiated 0.1 microsecond after the inhibit current. The timing requirements for the restore current 44 are identical to that of the read current. The fall time of the inhibit current 46 is 0.1 microsecond. The inhibit current 46 turnoff is enabled 50 nanoseconds after the restore current 44 turnoff to insure that the inhibit current comes down after the restore current.

The use of the ground plane in the manner shown shields the lines from each other and provides balance between the drive and sense-inhibit lines thereby contributing to noise reduction, faster recovery time and prevention of signal drift between the respective lines.

Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.

lclaim:

l. A magnetic core memory system comprising:

a ground plane having at least one aperture;

at least one magnetic core having a substantially toroidal configuration about an axis; said magnetic core being mounted within said aperture and having its axis substantially coplanar with ground plane;

first electrically conductive line means being threaded through said core adjacent to a first side of said ground plane;

second electrically conductive line means being threaded through said core adjacent to the opposite side of said ground plane; and

said first and second line means supporting said core within the aperture in the ground plane, and said line means having substantially the same length of line disposed across the aperture whereby the ground plane produces a balance between the first and second line means which, when signals occur in said line means, noise or ringing in at least one of said line means is substantially reduced.

3. A magnetic core memory system as set forth in claim 2 wherein said second line means comprises a sense-inhibit-line. 

1. A magnetic core memory system comprising: a ground plane having at least one aperture; at least one magnetic core having a substantially toroidal configuration about an axis; said magnetic core being mounted within said aperture and having its axis substantially coplanar with ground plane; first electrically conductive line means being threaded through said core adjacent to a first side of said ground plane; second electrically conductive line means being threaded through said core adjacent to the opposite side of said ground plane; and said first and second line means supporting said core within the aperture in the ground plane, and said line means having substantially the same length of line disposed across the aperture whereby the ground plane produces a balance between the first and second line means which, when signals occur in said line means, noise or ringing in at least one of said line means is substantially reduced.
 2. A magnetic core memory system as set forth in claim 1 wherein said first electrically conductive line means comprises respective address location lines.
 3. A magnetic core memory system as set forth in claim 2 wherein said second line means comprises a sense-inhibit line. 